Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2007-03-13
2007-03-13
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S154000, C375S242000
Reexamination Certificate
active
10033204
ABSTRACT:
A micro-controller is connected between a hardware-based adaptive differential pulse code modulation (ADPCM) decoder and a read only memory (ROM) storing both micro-controller programming instructions and ADPCM encoded source file data. A micro-controller architecture implements time multiplexed ROM addressing driven by a two phase clock signal. In an instruction phase, a program counter supplies ROM address(es) for retrieving micro-controller programming instructions. In a decoder phase, an address counter supplies ROM address (es) for retrieving portions of the ADPCM encoded source file data. ADPCM encoded source file data extracted from the ROM in the decoder phase of the clock signal is delivered to the decoder for processing during the subsequent instruction phase of the clock signal. The selection between program counter and address counter supplied addresses for application to the ROM is made by a two phase clock signal driven multiplexer.
REFERENCES:
patent: 4703477 (1987-10-01), Adelmann et al.
patent: 5105387 (1992-04-01), Childers et al.
patent: 5144242 (1992-09-01), Zeilenga et al.
patent: 5319573 (1994-06-01), Corleto et al.
patent: 5524008 (1996-06-01), Levy
patent: 5764941 (1998-06-01), Goto et al.
patent: 5799010 (1998-08-01), Lomp et al.
patent: 5931952 (1999-08-01), Lesmeister
patent: 6615166 (2003-09-01), Guheen et al.
patent: 09074377 (1997-03-01), None
Intel MCS®-51 Architectural Overview, pp. 1-18 through 1-21, dated unknown.
Holtek Semiconductor Inc., HT85XXX Green Voice™, pp. 1-11, dated Aug. 24, 2000.
Bataille Pierre-Michel
Jorgenson Lisa K.
Shenzhen STS Microelectronics Co. Ltd.
Szuwalski Andre M.
LandOfFree
ROM addressing method for an ADPCM decoder implementation does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with ROM addressing method for an ADPCM decoder implementation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and ROM addressing method for an ADPCM decoder implementation will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3758604