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DDR DRAM data coherence scheme

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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DDR flash implementation with direct register access to...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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DDR SDRAM memory controller with multiple dependency request...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Deadlock suppressing schemes in a raid system

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Decision mechanisms for adapting RAID operation placement

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Decoding device and semiconductor device which read file...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Deduplication of data on disk devices using low-latency...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Default instruction to hide nonvolatile memory core...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Defective data sector management system

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Deferred tuple space programming of expansion modules

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Deferred tuple space programming of expansion modules

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Deferred writing of data to be synchronized on magnetic tape...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Deferred writing of data to be synchronized on magnetic tape...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Deferring refreshes during calibrations in memory systems

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Delayed read/write scheme for SRAM interface compatible DRAM

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Demoting tracks from cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Design structure for content addressable memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Destage management of redundant data copies

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Destructive-read random access memory system buffered with...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Destructive-read random access memory system buffered with...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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