Default instruction to hide nonvolatile memory core...

Details Default instruction to hide nonvolatile memory core... Default instruction to hide nonvolatile memory core...

2006-04-13

2008-10-21

Bataille, Pierre-Michel (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

Reexamination Certificate

active

07441069

ABSTRACT:
A memory operating in an execute-in-place (XIP) type mode returns a default instruction when an nV memory core is not ready for access. The default instruction may be selected to provide a system stall when executed within a corresponding processor.

REFERENCES:
patent: 5673383 (1997-09-01), Sukegawa
patent: 6813191 (2004-11-01), Fujioka
patent: 7058779 (2006-06-01), McClain

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