Semiconductor memory device utilizing tunnel magneto...

Semiconductor memory device wherein gate electrode thickness is

Semiconductor memory device with a capacitor having a protection

Semiconductor memory device with a concentrated impurities in ch

Semiconductor memory device with a connector for a lower...

Semiconductor memory device with a pair of floating gates

Semiconductor memory device with a ring-shaped bit line

Semiconductor memory device with a silicide layer formed on...

Semiconductor memory device with a stacked capacitance structure

Semiconductor memory device with a stacked capacitor

Semiconductor memory device with a stacked gate including a...

Semiconductor memory device with a two-layer top gate

Semiconductor memory device with additional conductive line to p

Semiconductor memory device with an improved erroneous write cha

Semiconductor memory device with bit line of small...

Semiconductor memory device with bit lines having reduced...

Semiconductor memory device with cap structure and method of...

Semiconductor memory device with cell transistors having...

Semiconductor memory device with channel regions along...

Semiconductor memory device with channel regions along...