4. Active solid-state devices (e.g., transistors, solid-state diode
  5. Combined with electrical contact or lead
  6. Configuration or pattern of bonds
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Off-axis power branches for interior bond pad arrangements

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Patent

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Off-chip vias in stacked chips

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate

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Optimization of routing layers and board space requirements...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate

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