Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-05-29
2007-05-29
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S386000, C438S396000, C438S399000, C257SE21008
Reexamination Certificate
active
11106887
ABSTRACT:
A damascene MIM capacitor and a method of fabricating the MIM capacitor. The MIN capacitor includes a dielectric layer having top and bottom surfaces; a trench in the dielectric layer, the trench extending from the top surface to the bottom surface of the dielectric layer; a first plate of a MIM capacitor comprising a conformal conductive liner formed on all sidewalls and extending along a bottom of the trench, the bottom of the trench coplanar with the bottom surface of the dielectric layer; an insulating layer formed over a top surface of the conformal conductive liner; and a second plate of the MIM capacitor comprising a core conductor in direct physical contact with the insulating layer, the core conductor filling spaces in the trench not filled by the conformal conductive liner and the insulating layer. The method includes forming portions of the MIM capacitor simultaneously with damascene interconnection wires.
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Clevenger Lawrence A.
Dalton Timothy J.
Hsu Louis C.
Yang Chih-Chao
International Business Machines - Corporation
Schmeiser Olsen & Watts
Trepp Robert
Trinh Michael
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