Method for tuning a work function of high-k metal gate devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S283000, C438S585000, C257SE21434, C257SE21444

Reexamination Certificate

active

07927943

ABSTRACT:
The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming first and second transistors in the substrate, the first transistor having a first gate structure that includes a first dummy gate, the second transistor having a second gate structure that includes a second dummy gate, removing the first and second dummy gates thereby forming a first trench and a second trench, respectively, forming a first metal layer to partially fill in the first and second trenches, removing the first metal layer within the first trench, forming a second metal layer to partially fill in the first and second trenches, forming a third metal layer to partially fill in the first and second trenches, reflowing the second metal layer and the third metal layer, and forming a fourth metal layer to fill in the remainder of the first and second trenches.

REFERENCES:
patent: 2006/0081939 (2006-04-01), Akasaka et al.
patent: 2007/0066077 (2007-03-01), Akasaka et al.
patent: 2008/0087966 (2008-04-01), Tai et al.
patent: 2009/0039433 (2009-02-01), Yang et al.
patent: 2009/0302412 (2009-12-01), Cheng et al.
patent: 1947242 (2007-04-01), None
patent: 2008193060 (2008-08-01), None
Chinese Patent Office, Office Action dated Oct. 11, 2010, Application No. 200910169148.7, 5 pages.

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