Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-07-10
2009-08-18
Ton, David (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S048000
Reexamination Certificate
active
07577886
ABSTRACT:
An electronic circuit comprises a plurality of configurable cells configured according to a chaining command signal. These configurable cells are configured either in a chained state in which the configurable cells are functionally connected in a chain to form a shift register, if the chaining command signal is in a first state, or in a functional state in which the configurable cells are functionally linked to logic cells with which they co-operate to form at least one logic circuit, if the mode command signal is in a second state. It is provided that a test data word will be preceded by a signature. The set formed by the digital signature and the data word forms a test sequence. The signature is verified before the introduction of the test data word by an appropriate detection circuit.
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Bancel Frédéric
Hely David
Graybeal Jackson LLP
STMicroelectronics SA
Ton David
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