Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Inventor
active
Electronic circuit comprising a test mode secured by...
Integrated circuit comprising a test mode secured by the use...
Integrated circuit comprising a test mode secured by...
Method and device for securing the reading of a memory
Method for testing an electronic circuit comprising a test...
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Profile ID: LFUS-PAI-P-2193598