4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Frédéric Bancel

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Electronic circuit comprising a test mode secured by...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Integrated circuit comprising a test mode secured by the use...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Integrated circuit comprising a test mode secured by...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Method and device for securing the reading of a memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate

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Method for checking the integrity of a clock tree

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2193597

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