Etching a metal hard mask for an integrated circuit structure

Details Etching a metal hard mask for an integrated circuit structure Etching a metal hard mask for an integrated circuit structure

2005-08-16

2005-08-16

Norton, Nadine G. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S717000, C438S720000, C438S723000, C438S725000

Reexamination Certificate

active

06930048

ABSTRACT:
The invention is a method of etching an integrated circuit (IC) structure that includes a metal hard mask layer. The etching of the metal hard mask layer is performed by first feeding a gas mixture comprising a fluorine containing gas and oxygen (O2) gas to a reactor. The method then proceeds to generate a plasma that etches the metal hard mask layer. The method can be applied to either performing a via etch or a trench etch. Additionally, the invention teaches the removal of a photoresist layer without affecting the metal hard mask layer.

REFERENCES:
patent: 6121150 (2000-09-01), Avanzino et al.
patent: 6194323 (2001-02-01), Downey et al.
patent: 6734096 (2004-05-01), Dalton et al.

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