Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-06-06
2006-06-06
Sarkar, Asok Kumar (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
07056782
ABSTRACT:
The present invention provides a complementary metal oxide semiconductor integration process whereby a plurality of silicided metal gates are fabricated atop a gate dielectric. Each silicided metal gate that is formed using the integration scheme of the present invention has the same silicide metal phase and substantially the same height, regardless of the dimension of the silicide metal gate. The present invention also provides various methods of forming a CMOS structure having silicided contacts in which the polySi gate heights are substantially the same across the entire surface of a semiconductor structure.
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Amos Ricky S.
Boyd Diane C.
Cabral, Jr. Cyril
Kaplan Richard D.
Kedzierski Jakub T.
International Business Machines - Corporation
Sarkar Asok Kumar
Scully , Scott, Murphy & Presser, P.C.
Trepp, Esq. Robert M.
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