4. Static information storage and retrieval
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NVM PMOS-cell with one erased and two programmed states

Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate

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NVRAM array architecture utilizing common bitline and wordline

Static information storage and retrieval – Floating gate – Particular connection
Patent

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NVRAM memory cell architecture that integrates conventional...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate

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nvSRAM with multiple non-volatile memory cells for each SRAM...

Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate

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