Race condition improvements in dual match line architectures

Range checking content addressable memory array

Re-configurable content addressable/dual port memory

Read and match circuit for low-voltage content addressable...

Recognition memory with multiwrite and masking

Reconfigurable memory block redundancy to repair defective...

Reduced signal swing in bit lines in a CAM

Reduced signal swing in bit lines in a CAM

Reduced turn-on current content addressable memory (CAM)...

Reduced-pitch 6-transistor NMOS content-addressable-memory cell

Reducing power dissipation in a match detection circuit

Reducing power dissipation in a match detection circuit

Reducing signal swing in a match detection circuit

Reducing signal swing in a match detection circuit

Redundant array architecture for word replacement in CAM

Redundant array architecture for word replacement in CAM

Redundant scheme for CAMRAM memory array

Reformulating regular expressions into...

Register stack in cache memory

Relational content addressable memory