Reconfigurable memory block redundancy to repair defective...

Details Reconfigurable memory block redundancy to repair defective... Reconfigurable memory block redundancy to repair defective...

2007-10-23

2007-10-23

Phan, Trong (Department: 2827)

Static information storage and retrieval

Associative memories

Ferroelectric cell

C365S200000, C365S230030, C365S230060

Reexamination Certificate

active

11240304

ABSTRACT:
An embodiment of the present invention is a technique to provide a reconfigurable repair circuit in a memory device. A table structure contains a plurality of entries, each entry having a defective address word and a redundant address word. The redundant address word corresponds to a redundant block and is generated in response to a memory access to a defective input/output (I/O) line in a memory block of the memory device. A decoding circuit decodes the redundant address word to select a redundant I/O line in the redundant block to replace the defective I/O line.

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patent: WO 96/34391 (1996-10-01), None

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