Method and system using a common reset and a slower reset clock
Method and/or apparatus for generating a write gated clock...
Method and/or architecture for switching a precision current
Method and/or circuit for generating precision programmable...
Method for a dynamic termination logic driver with improved...
Method for achieving low feed-through and consistent...
Method for adjusting clock skew
Method for adjusting the center frequency of a phase locked...
Method for amplifying voltage in Josephon junction
Method for an output driver with improved impedance control
Method for an output driver with improved slew rate control
Method for application of gating signal in insulated double...
Method for arranging tree-type clock signal distributing circuit
Method for automatic duty cycle control using adaptive body...
Method for calibrating threshold levels on comparators with...
Method for charge pump tri-state and power down/up sequence...
Method for checking the integrity of a clock tree
Method for configurably enabling pulse clock generation for...
Method for configuring multiple-output phase-locked loop...
Method for continuous waveform synthesis