Dual control analog delay element

Dual data rate flip-flop

Dual edge count programmable frequency divider

Dual edge D flip flop

Dual edge programmable delay unit

Dual edge-triggered flip-flop design with asynchronous...

Dual FET driver circuit

Dual latch clocked LSSD and method

Dual latch clocked LSSD and method

Dual loop architecture useful for a programmable clock...

Dual loop architecture useful for a programmable clock...

Dual loop delay-locked loop

Dual loop PLL with secondary loop to achieve 50% duty cycle

Dual mode clock generator

Dual mode programmable delay element

Dual operational mode CML latch

Dual operational mode CML latch

Dual output capacitance interface circuit

Dual output comparator for operating over a wide common mode ran

Dual output differential line driver using single current