Dual output capacitance interface circuit

Details Dual output capacitance interface circuit Dual output capacitance interface circuit

2001-01-05

2002-09-17

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Converting input current or voltage to output frequency

C327S102000, C327S103000

Reexamination Certificate

active

06452427

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The invention relates to circuits for interfacing with and deriving usable signals from transducers, more particularly capacitive force transducers such as pressure transducers, more particularly touch mode capacitive pressure sensors (“TMCPS”).
BACKGROUND OF THE INVENTION
Capacitive pressure sensors typically include a pair of conductive elements, one of which is a fixed substrate another of which is a flexible diaphragm. In a conventional capacitive pressure sensor, as pressure increases a gap between the diaphragm and the underlying substrate decreases, and the capacitance of the sensor increases. The sensor is normally operated in a pressure range wherein the diaphragm is kept from actually contacting the underlying substrate. These sensors normally exhibit nonlinear characteristics. This inherent non-linearity has led to the development of many linearization schemes using complex and costly interface circuits which include analog circuits and amplifiers, segment linearization, microprocessor and ROM matrix linearization, etc.
Another type of capacitive pressure sensor is the touch mode capacitive pressure sensor (“TMCPS”). In touch mode operation, the diaphragm of the capacitive pressure sensor touches the underlying substrate which is covered by a thin insulating layer. As pressure increases, the contact area increases. The major component of output capacitance is the capacitance of the touched area with a thin layer of isolation layer which gives a larger capacitance per unit area compared to the air-gap capacitance in the untouched area. The touch mode device was developed to withstand harsh industrial environment, and with one or two orders of magnitude higher sensitivity than the normal (non-touch) mode operation in the near linear operation range, so that some of the stray capacity effects can be neglected. Advantages of touch mode capacitive pressure sensors include near linear output characteristics, large over-range pressure capability and robust structure that make them capable to withstand harsh industrial field environments. One application of interest for pressure sensors generally, and touch mode capacitive pressure sensors in particular, is in conjunction with an RF transponder inside a pneumatic tire.
Examples of capacitive pressure sensors can be found in U.S. Pat. No. 3,993,939 (November 1976), U.S. Pat. No. 5,528,452 (June 1996), U.S. Pat. No. 5.656,781 (August 1997), and U.S. Pat. No. 5,706,565 (January 1998).
A number of different constructions for touch mode capacitive pressure sensors (TMCPS) have been successfully designed and fabricated, including a silicon-glass TMCPS using anodic bonding technique to assemble a silicon diaphragm and a glass substrate with a metallized electrode, a silicon-silicon TMCPS using silicon fusion bonding to assemble a silicon diaphragm and silicon substrate, and a polysilicon TMCPS using surface micromachining technology. The present invention is particularly applicable to obtaining usable signals from a silicon fusion bonded capacitive pressure sensor (SFBCPS) such as is disclosed in Touch mode capacitive pressure sensors. Ko and Wang, published by Elsevier, in Sensors and Actuators 2303 (1999), as well as in the aforementioned commonly-owned, copending PCT Patent Application Ser. No. 09/743,432 entitled METHOD OF FABRICATING SILICON CAPACITIVE SENSORS, filed on even date herewith. As discussed in the Elsevier article:
“FIG. 8 shows the outline of major steps of the fabrication of SFBCPS. Two silicon wafers are needed to make silicon fusion bonded capacitive pressure sensors. On wafer A, cavities are formed by silicon etching to define the gap. The bottom electrode on wafer A is formed by boron diffusion on the bottom of the cavity. A capacitive absolute pressure sensor needs an electrode feedthrough from a hermetically sealed cavity. In the design, the electrode feedthrough is lain down in a groove in the feedthrough region. (The groove is sealed after the bonding and etching processes). The isolation between two electrodes of the sensor is realized by the thermal oxide on the bonding surface. Due to doping concentration dependent oxidation, there is usually a step generated in the feedthrough region if the feedthrough electrode is on the surface. This will cause difficulties for silicon fusion bonding and hermetic sealing. The P+ doped electrode lain down in a groove, on the other hand, will not disturb the silicon fusion bonding surface even with a thick oxide growth. An extra sealing process by LTO deposition (400 mTorr, 450(C) is used to get a hermetically sealed reference cavity of the sensor after diaphragm formation. The pressure inside the cavity is around 150 mTorr after the sealing process. On wafer B, heavily boron doped diaphragm layer is formed by diffusion using solid source BN. After CMP, wafers A and B are bonded using Si fusion bonding, annealed at 1000 (C for 1 hour. P+ etch-stop technique is then used to fabricate the diaphragm with the designed thickness.”
“The process discussed before can be simplified to a three-layer process. The structure of the fabricated sensor is illustrated in FIG. 10. The substrate as whole will be used as the bottom electrode. The gap is defined by the thickness of thermally grown oxide. Since there is no electrode feedthrough required, the hermetically sealed reference cavity can be formed by silicon to silicon fusion bonding without introducing extra processes. There are two capacitors constructed on the sensor chip. One is constructed by silicon diaphragm and the substrate separated by a reference cavity plus the surrounding bonding area. This capacitor is pressure sensitive. The other is constructed by silicon diaphragm and the substrate separated by the oxide in the rest of the bonding area. It is insensitive to pressure and can be used as a reference capacitor. The sensor chip is 1.0 mm×1.5 mm×0.4 mm in size. The diaphragm sizes range from 300 to 400 (mn in diameters. The process starts with the P-type substrate silicon wafer with 2.2-(m thermally grown oxide. The thickness of the oxide determines the initial gap of the capacitive pressure sensor. The oxide in cavity area is etched using RIE, which can give very vertical sidewall after etching. The same thickness of oxide on the backside wafer can be used not only as wet silicon etch mask, but also compensates the stress in the front side oxide so that the wafer can keep flat for the silicon fusion bonding. After cavity formation, a 0.1-(m thick oxide is grown for the electrical isolation after the diaphragm touches the bottom. The top silicon wafer with a well-defined thickness of heavily doped boron is then bonded to the cavity patterned substrate wafer using silicon fusion bond technique. No alignment is required during the bonding. Following the bonding, the Si—Si “wafer” is immersed in a dopant-dependent etchant (such as EDP, KOH and TMAH) to dissolve the silicon of the top wafer except the P+ layer. The P+ layer is then patterned to form the two capacitors and open the substrate contact window. Al contact pads are formed in the end using lift-off technique. This process utilizes single-side processing of silicon wafers. It only requires three non-critical masking steps and can produce very high yield.”
It has been observed that one drawback of the silicon fusion bonded capacitive pressure sensors is that they have large zero-pressure capacitance, which limits applications of some capacitive interface circuits. The large zero-pressure capacitance originates from the large bonding area and the isolation material with a large dielectric constant surrounding the diaphragm. At zero-pressure, since the deflection of the diaphragm is small, the gap distance between diaphragm and the electrode on the bottom electrode is large. Therefore the capacitance of the air-gap capacitor contributes a small part to the overall capacitance at zero-pressure. The zero-pressure capacitance is mainly determined by the bonding area required to ensure the hermetic seal

Affiliated with

Also associated with

Rating

Dual output capacitance interface circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual output capacitance interface circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual output capacitance interface circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2830488