Method and system for providing an interconnect layout to reduce

Details Method and system for providing an interconnect layout to reduce Method and system for providing an interconnect layout to reduce

1997-09-30

1999-11-16

Mis, David

Electronic digital logic circuitry

Significant integrated structure, layout, or layout...

257775, H01L 21768, H01L 23535

Patent

active

059864770

ABSTRACT:
A system and method for providing a plurality of interconnects for a microcircuit is disclosed. The microcircuit has a plurality of functional components. The method and system include determining the placement of each of the plurality of functional components and determining a width of each of the plurality of interconnects. The determination of the width is based on a capacitance between each interconnect and a portion of the plurality of interconnects.

REFERENCES:
patent: 4445266 (1984-05-01), Mai et al.
patent: 5372969 (1994-12-01), Moslehi

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