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Architecture for reducing leakage component in semiconductor...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate

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Arrangement and method for adjustment of the slope times for...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate

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Arrangement for improving the ESD protection in a CMOS buffer

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate

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ASIC architecture for active-compensation of a programmable...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Asymmetric bidirectional bus implemented using an I/O device...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Asymmetric current mode driver for differential transmission lin

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Patent

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Asynchronous coupling and decoupling of chips

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Asynchronous interconnection system for 3D interchip...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
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Asynchronous self-adjusting input circuit

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Input noise margin enhancement
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Automatic SCSI termination circuit

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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