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Cache fencing for interpretive environments

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
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Compare branch instruction pairing within a single integer...

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
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Component with a dynamically reconfigurable architecture

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
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Computing system and method that determines current...

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
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Condition code register architecture for supporting multiple...

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
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Conditional execution per lane

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
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Conditional execution per lane

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
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Conditional execution with multiple destination stores

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
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Configurable data processing device with bit reordering on...

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
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Converting short branches to predicated instructions

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
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