Conditional execution per lane

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition

Reexamination Certificate

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Details

C712S022000

Reexamination Certificate

active

06986025

ABSTRACT:
A computer system for conditionally performing an operation defined in a computer instruction, an execution unit of the computer system comprises at least one operand store for holding operands on which an operation defined in an instruction is to be performed, wherein said operand store defines a plurality of lanes each holding an object, a plurality of operators associated respectively with the lanes for carrying out an operation specified in an instruction on objects in the operand lanes, a destination store for holding objects resulting from the operation on a lane by lane basis, a plurality of control stores each comprising a plurality of indicators to control for each lane whether or not an operation defined in an instruction is to be performed on that lane, and control circuitry for controlling which of said plurality of control stores is to be used to control per lane execution of an instruction, the control circuitry being operative to select a control store from the plurality of control stores based on a field contained in the instruction. A method and computer program for performing conditional execution are also claimed.

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patent: WO 01/06353 (2001-01-01), None
Lee, Ruby B., “Subword Parallelism With MAX-2”IEEE Inc., vol. 16, No. 4, 1996.
International Search Report issued Mar. 19, 2003 for Appln. No. EP 02 25 4000, 3 pages.

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