Split directory-based cache coherency technique for a...

Split embedded DRAM processor

Split embedded DRAM processor

Split embedded DRAM processor

Split embedded DRAM processor

Staggered execution stack for vector processing

Standard cell, 4-cycle, 8-bit microcontroller

Storage medium driving device, storage medium and data...

Storing and transferring SIMD saturation history flags and...

Stream processing in optically linked super node clusters of...

Stream processing in super node clusters of processors...

Stream processing system having a reconfigurable memory module

Structure of processor having a plurality of main processors and

Sub-pipelined and pipelined execution in a VLIW

Subsystem bridge of AMBA's ASB bus to peripheral...

Super-reconfigurable fabric architecture (SURFA): a...

Superscalar microprocessor configured to predict return addresse

Superscalar microprocessor configured to predict return...

Superscalar microprocessor for out-of-order and concurrently exe

Superscalar microprocessor including a load/store unit,...