Electrical computers and digital processing systems: processing – Processing architecture – Superscalar
Patent
1997-01-16
1999-11-09
Lim, Krisna
Electrical computers and digital processing systems: processing
Processing architecture
Superscalar
712 41, 712206, 712215, 712217, G06F 930, G06F 938
Patent
active
059833343
ABSTRACT:
A system and method for extracting complex, variable length computer instructions from a stream of complex instructions each subdivided into a variable number of instructions bytes, and aligning instruction bytes of individual ones of the complex instructions. The system receives a portion of the stream of complex instructions and extracts a first set of instruction bytes starting with the first instruction bytes, using an extract shifter. The set of instruction bytes are then passed to an align latch where they are aligned and output to a next instruction detector. The next instruction detector determines the end of the first instruction based on said set of instruction bytes. An extract shifter is used to extract and provide the next set of instruction bytes to an align shifter which aligns and outputs the next instruction. The process is then repeated for the remaining instruction bytes in the stream of complex instructions. The isolated complex instructions are decoded into nano-instructions which are processed by a RISC processor core.
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Coon Brett
Miyayama Yoshiyuki
Nguyen Le Trong
Wang Johannes
Lim Krisna
Seiko Epson Corporation
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