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Range code compression method and apparatus for ternary...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Range compare circuit for search engine

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Range content-addressable memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Range representation in a content addressable memory (CAM)...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Range-based cache control system and method

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Range-based cache control system and method

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Rank select operation between an XIO interface and a double...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Ranked cleaning policy and error recovery method for file...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Rapid defragmentation of storage volumes

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Rapid locality selection for efficient memory allocation

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Rapid locality selection for efficient memory allocation

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Rapid partial configuration of reconfigurable devices

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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Rapidly-readable register file

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Rate based memory replacement mechanism for replacing cache entr

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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RDMA copy-on-write

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Re-fetching cache memory enabling alternative operational modes

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Re-fetching cache memory having coherent re-fetching

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Re-flash protection for flash memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Re-ordering requests for shared resources

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Reactive placement controller for interfacing with banked...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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