Re-fetching cache memory having coherent re-fetching

Details Re-fetching cache memory having coherent re-fetching Re-fetching cache memory having coherent re-fetching

2011-01-18

2011-01-18

Bragdon, Reginald G (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S118000, C711S128000, C711S145000, C711S137000, C711SE12051

Reexamination Certificate

active

07873788

ABSTRACT:
A re-fetching cache memory improves efficiency of a processor, for example by reducing power consumption and/or by advantageously sharing the cache memory. When the cache memory is disabled or temporarily used for another purpose, a data portion of the cache memory is flushed, and some or all of a tag portion is saved in an archive. In some embodiments, the tag portion operates “in-place” as the archive, and in further embodiments, is placed in a reduced-power mode. When the cache memory is re-enabled or when the temporary use completes, optionally and/or selectively, the tag portion is repopulated from some or all of the archive, and the data portion is re-fetched according to the repopulated tag portion. The re-fetching is optionally performed in a cache coherent fashion. According to various embodiments, processor access to the cache is enabled during one or more of: the saving; the repopulating; and the re-fetching.

REFERENCES:
patent: 3938097 (1976-02-01), Niguette, III
patent: 4219875 (1980-08-01), Templeton
patent: 5493668 (1996-02-01), Elko et al.
patent: 5559952 (1996-09-01), Fujimoto
patent: 5809555 (1998-09-01), Hobson
patent: 6141737 (2000-10-01), Krantz et al.
patent: 6219745 (2001-04-01), Strongin et al.
patent: 6317744 (2001-11-01), Elko et al.
patent: 6397308 (2002-05-01), Ofek et al.
patent: 6438661 (2002-08-01), Beardsley et al.
patent: 6657634 (2003-12-01), Sinclair et al.
patent: 6665775 (2003-12-01), Maiyuran et al.
patent: 6721943 (2004-04-01), Krishnaiyer et al.
patent: 6745293 (2004-06-01), Lasserre et al.
patent: 6801208 (2004-10-01), Keshava et al.
patent: 6816750 (2004-11-01), Klaas
patent: 6845426 (2005-01-01), Kuwata
patent: 6857058 (2005-02-01), Gurumoorthy et al.
patent: 6891543 (2005-05-01), Wyatt
patent: 6963987 (2005-11-01), Emons
patent: 6978357 (2005-12-01), Hacking et al.
patent: 7035990 (2006-04-01), Muhlbauer
patent: 7058839 (2006-06-01), Imming
patent: 7139933 (2006-11-01), Hsu et al.
patent: 7516274 (2007-05-01), Moll et al.
patent: 7412570 (2007-06-01), Moll et al.
patent: 7266641 (2007-09-01), Kamei et al.
patent: 7268787 (2007-09-01), Hong et al.
patent: 7444491 (2008-10-01), Steinbusch
patent: 7484065 (2009-01-01), Pomaranski et al.
patent: 7523284 (2009-04-01), Wilson
patent: 7549034 (2009-06-01), Foster, Sr. et al.
patent: 7681057 (2010-03-01), Payne
patent: 2002/0116576 (2002-08-01), Keshava et al.
patent: 2003/0033386 (2003-02-01), Dahlen et al.
patent: 2003/0079088 (2003-04-01), Malik
patent: 2003/0115423 (2003-06-01), Chang
patent: 2003/0196045 (2003-10-01), Matsubara et al.
patent: 2004/0205301 (2004-10-01), Hara et al.
patent: 2004/0215883 (2004-10-01), Bamford et al.
patent: 2005/0005073 (2005-01-01), Pruvost et al.
patent: 2005/0044325 (2005-02-01), Rowlands et al.
patent: 2005/0044448 (2005-02-01), Verdun
patent: 2005/0055512 (2005-03-01), Kishi
patent: 2005/0114557 (2005-05-01), Arai et al.
patent: 2005/0114559 (2005-05-01), Miller
patent: 2005/0193176 (2005-09-01), Edirisooriya et al.
patent: 2006/0015683 (2006-01-01), Ashmore et al.
patent: 2006/0047884 (2006-03-01), Tran et al.
patent: 2006/0095806 (2006-05-01), Dai et al.
patent: 2006/0143396 (2006-06-01), Cabot
patent: 2006/0218352 (2006-09-01), Shannon et al.
patent: 2006/0268592 (2006-11-01), Mohammad et al.
patent: 2007/0011421 (2007-01-01), Keller et al.
patent: 2007/0016729 (2007-01-01), Correale et al.
patent: 2007/0033332 (2007-02-01), Sinclair et al.
patent: 2007/0061511 (2007-03-01), Faber
patent: 2007/0067578 (2007-03-01), Kurichiyath
patent: 2007/0094450 (2007-04-01), VanderWiel
patent: 2007/0233964 (2007-10-01), Robinson
patent: 2007/0288783 (2007-12-01), Ogasawara et al.
patent: 2008/0294846 (2008-11-01), Bali et al.
patent: 1344403 (2002-04-01), None
patent: 06195265 (1994-07-01), None
patent: 06195265 (1994-07-01), None
patent: 9844405 (1998-10-01), None
patent: 9850846 (1998-11-01), None
patent: 0139164 (2001-05-01), None
patent: 2007059085 (2007-05-01), None
Handy, J., The Cache Memory Book, Second Edition, Academic Press, Inc., Jan. 1998, pp. 2-5 and 80-87.
Mostinski, R. and Yoder, D., 2D/3D Graphics Support in the i.MX31 and i.MX31L Multimedia Applications Processors, Freescale Semiconductor, Jun. 2005, pp. 1-12.
Pan, H. and Asanovic, K., Heads and Tails: A Variable-Length Instruction Format Supporting Parallel Fetch and Decode, CASES '01, Nov. 16-17, 2001, pp. 1-8.
Hennessy, J. L. and Patterson, D. A., Computer Organization and Design, The Hardware/Software Interface, Second Edition, Jan. 1998, pp. 19 and B-31.
Speight, E., Shafi, H., Zhang, L., Rajamony, R., “Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors”, Novel Systems Architecture Group, ISCA'05, May 2005, 11 pages.
Hanlon, A., “Content-Addressable and Associative Memory Systems”, IEEE, May 2, 1966, 13 pages.
Sartor, J., Venkiteswaran, S., McKinley, K., Wang, Z., “Cooperative Caching with Keep-Me and Evict-Me”, The Computer Society, Jan. 2005, 12 pages.
U.S. Office Action issued for related U.S. Appl. No. 11/751,973, mailed Aug. 18, 2009.
AGP 3.0 Specification, Intel, Sep. 2002.
First Office Action for Chinese Application No. 2006800507749 mailed on Feb. 5, 2010, and English translation thereof, 12 pages.
Chinese Office Action issued for related application No. 200680050850.6, mailed Mar. 8, 2010, and English translation thereof, 12 pages.
U.S. Office Action issued for related U.S. Appl. No. 11/759,218, dated Feb. 4, 2010.
U.S. Office Action issued for related U.S. Appl. No. 11/751,973, dated Mar. 1, 2010.
Examination Report from the Taiwan Intellectual Office issued for related patent application No. 095142014, dated May 26, 2010, and English translation thereof, 15 pages.
U.S. Notice of Allowance for U.S. Appl. No. 11/559,192, mailed on Jun. 21, 2010 (16 pages).
U.S. Office Action for U.S. Appl. No. 11/559,133, mailed on Mar. 5, 2010 (14 pages).
U.S. Notice of Allowance for U.S. Appl. No. 11/559,133, mailed on Jul. 2, 2010 (16 pages).
U.S. Notice of Allowance for U.S. Appl. No. 11/559,133, mailed on Oct. 15, 2010 (11 pages).
U.S. Notice of Allowance for U.S. Appl. No. 11/559,192, mailed on Oct. 6, 2010 (14 pages).
U.S. Office Action for U.S. Appl. No. 11/559,069, mailed on Sep. 13, 2010 (15 pages).
U.S. Notice of Allowance for U.S. Appl. No. 11/751,973, mailed on Oct. 6, 2010 (11 pages).
Chinese Office Action for Chinese Application No. 200680050850.6, mailed on Oct. 13, 2010 (9 pages).

Affiliated with

Also associated with

Rating

Re-fetching cache memory having coherent re-fetching does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Re-fetching cache memory having coherent re-fetching, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Re-fetching cache memory having coherent re-fetching will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2666653