Range representation in a content addressable memory (CAM)...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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C711SE12017, C365S049100

Reexamination Certificate

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07555594

ABSTRACT:
In a method and apparatus for encoding a bit field within a memory device, the bit field is encoded in a manner that requires fewer memory device entries and fewer encoded bits per entry than conventional encoding schemes.

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“Algorithms for Advanced Packet Classification with Ternary CAMs,” Lakshminarayanan et al., ACM SIGCOMM '05, Aug. 21-26, 2005 Philadelphia Pennsylvania.
“Fast scalable level-four switching,” Srinivasan et al., ACM SIGCOMM Computer Communication Review, 1998 vol. 28, Issue 4, pp. 191-202.

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