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Maximizing storage system throughput by measuring system...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Maximizing storage system throughput by measuring system...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Maximizing throughput in a pairwise-redundant storage system

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Means to extend tTR range of RDRAMS via the RDRAM memory...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Mechanism and apparatus allowing an N-way set associative...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism and method employing a plurality of hash functions...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism and method for cache snoop filtering

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism and method for cache snoop filtering

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for automatic backups in a mobile system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for bank conflict resolution for an out-of-order...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Mechanism for broadside reads of CAM structures

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Mechanism for collapsing store misses in an SMP computer system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for dynamically-allocated variables in an...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Mechanism for effectively caching streaming and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for efficient low priority write draining

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Mechanism for ensuring data coherency during sequential...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for extending properties of virtual memory pages...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Mechanism for fast revalidation of virtual tags

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Mechanism for folding storage barrier operations in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for handling 16-bit addressing in a processor

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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