Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-06-28
2008-03-25
Peugh, Brian (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S152000
Reexamination Certificate
active
07350031
ABSTRACT:
According to one embodiment, a system is disclosed. The system includes a first processor to operate a host system and a chipset, coupled to the first processor and the hard disk drive to operate an embedded system. The first processor includes a first file cache to maintain updates to one or more files at a storage medium and a first cache manager (CM) to control the updates to the first file cache. The second processor includes a second file cache to maintain the updates to the one or more files and a second CM to control the updates to the second file cache.
REFERENCES:
patent: 6381674 (2002-04-01), DeKoning et al.
patent: 6678788 (2004-01-01), O'Connell
patent: 2006/0294198 (2006-12-01), Muralidhar et al.
Idgunji Rohit
Lord Chris
Muralidhar Rajeev
Blakely , Sokoloff, Taylor & Zafman LLP
Peugh Brian
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