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Dynamic node partitioning utilizing sleep state

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Dynamic non-coherent cache memory resizing mechanism

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Dynamic NV-RAM

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Dynamic operating point modification in an integrated circuit

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Dynamic operation mode transition of a storage subsystem

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Dynamic optimization of cache memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Dynamic optimization of cache memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Dynamic optimization of device limits and thresholds in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Dynamic page conflict prediction for DRAM

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Dynamic parity distribution technique

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Dynamic partitioning of a reusable resource

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Dynamic partitioning of memory banks among multiple agents

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Dynamic partitioning of storage media for mixed applications

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Dynamic phase alignment for resynchronization of captured data

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Dynamic prefetch in continuous burst read operation

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
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Dynamic priority external transaction system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Dynamic programmable intelligent search memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Dynamic RAM disk

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Dynamic RAM in a microprocessor system

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Dynamic random access memories with hidden refresh and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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