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Cache coherency mechanism

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency mechanism using an operation to be executed...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency mechanism using arbitration masks

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol employing a read operation...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol for a data processing system...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol having an imprecise hovering (H)...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol having hovering (H) and recent (R)...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol having hovering (H), recent (R),...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol having tagged state used with...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol in which a load instruction hint...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol including a hovering (H) state...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol including an HR state

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol including generic transient states

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol including generic transient states

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol permitting sharing of a locked data...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol with ambiguous state for posted...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol with efficient write-through aliasing

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol with independent implementation of opti

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol with selectively implemented tagged...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol with tagged intervention of...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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