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Auxiliary register file accessing technique

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing extended or expanded memory
Patent

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Auxiliary storage controlling method and auxiliary storage contr

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Auxiliary storage slot scavenger

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate

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Auxiliary translation lookaside buffer for assisting in accessin

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent

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Avoidance of cache synonyms

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent

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Avoiding cache collisions between frequently accessed, pinned ro

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Avoiding cache line sharing in virtual machines

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Avoiding copy on first write

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate

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Avoiding deadlock between storage assignments by devices in...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate

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Avoiding deadlocks in a multiprocessor system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Avoiding failure of an initial program load in a logical...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate

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Avoiding failure of an initial program load in a logical...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate

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Avoiding inconsistencies between multiple translators in an...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Avoiding livelock using a cache manager in multiple core...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Avoiding locks by transactionally executing critical sections

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Avoiding locks by transactionally executing critical sections

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Avoiding mapping conflicts in a translation look-aside buffer

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate

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Avoiding tag compares during writes in multi-level cache...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Avoiding use of an inter-unit network in a storage system...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate

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