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Node controller for performing cache coherence control and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Node polling in consistency group formation

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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NoDMA cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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NoDMA cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Non-blocking distinct grouping of database entries with...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Non-blocking growable arrays

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Non-blocking hierarchical cache throttle

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Non-contiguous address erasable blocks and command in flash...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Non-contiguous address erasable blocks and command in flash...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Non-disruptive migration using device identity spoofing and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Non-DRAM indicator and method of accessing data not stored...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Non-fenced list DMA command mechanism

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Non-inclusive cache method using pipelined snoop bus

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Non-inclusive cache system using pipelined snoop bus

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Non-inclusive cache system with simple control operation

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Non-interfering seek behavior modification for improved hard...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Non-intrusive crash consistent copying in distributed...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Non-intrusive replication of hard disk

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Non-preemptive memory locking mechanism in a shared resource...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Non-redundant nonvolatile memory and method for sequentially...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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