Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2005-06-23
2009-12-29
Kim, Matt (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S105000, C365S212000, C374S141000
Reexamination Certificate
active
07640392
ABSTRACT:
Data not stored in the DRAM array of a SDRAM module, such as the output of a temperature sensor, are read from the SDRAM in a synchronous read cycle that is seamlessly interspersed with SDRAM read and write cycles directed to data in the DRAM array. Control information, including a non-DRAM indicator in the case of data not stored in a DRAM array, are maintained for all read cycles. Returned data stored in a DRAM array and data not stored in a DRAM array are buffered together. When extracting read data from the buffer, data not stored in a DRAM array are identified by the non-DRAM indicator and directed to circuits within the controller. When data not stored in the DRAM array indicates the temperature of the SDRAM die, the controller may adjust the refresh rate in response to the temperature.
REFERENCES:
patent: 5787255 (1998-07-01), Parlan et al.
patent: 6401213 (2002-06-01), Jeddeloh
patent: 6453218 (2002-09-01), Vergis
patent: 6667905 (2003-12-01), Dono et al.
patent: 6728798 (2004-04-01), Roohparvar
patent: 6757857 (2004-06-01), Lamb et al.
patent: 6778459 (2004-08-01), Blodgett
patent: 6957308 (2005-10-01), Patel
patent: 7096283 (2006-08-01), Roohparvar
patent: 7230876 (2007-06-01), Walker
patent: 7251192 (2007-07-01), Walker
patent: 7304905 (2007-12-01), Hsu et al.
patent: 2001/0014049 (2001-08-01), Woo et al.
patent: 2002/0056022 (2002-05-01), Leung
patent: 2002/0078282 (2002-06-01), Drerup et al.
patent: 2003/0158696 (2003-08-01), Gold et al.
patent: 2004/0230718 (2004-11-01), Polzin et al.
patent: 2005/0007864 (2005-01-01), Chung et al.
patent: 2005/0060481 (2005-03-01), Bleonozink
patent: 2006/0239095 (2006-10-01), Shi et al.
patent: 2006/0265615 (2006-11-01), Jenzen et al.
patent: 2007/0047378 (2007-03-01), Wolford
patent: 0797207 (1997-09-01), None
patent: 0851427 (1998-07-01), None
Gillingham P et al:“SLDRAM:High Performance, Open-Standard Memory” IEEE Micro, IEEE Service Center, Los Alamitos, CA, US, vol. 17, No. 6, Nov. 1997 (Nov. 1997), pp. 29-39, XP000726002 ISSN: 0272-1732 pp. 31-36.
International Preliminary Examination Report-PCT/US06/024498, International Search Authority-European Patent Office-Dec. 24, 2007.
International Search Report-PCT/US06/024498, International Search Authority-European Patent Office-Apr. 10, 2007.
JEDEC Standard; “Double Data Rate (DDR) SDRAM Specification”, JESD79E (May 2005).
Written Opinion-PCT/US06/024498, International Search Authority-European Patent Office-Apr. 10, 2007.
Kamarchik Peter M.
Kim Matt
Krofcheck Michael C
Pauley Nicholas J.
QUALCOMM Incorporated
LandOfFree
Non-DRAM indicator and method of accessing data not stored... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Non-DRAM indicator and method of accessing data not stored..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-DRAM indicator and method of accessing data not stored... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4112495