Multiple replication levels with pooled devices
Multiple row address strobe DRAM architecture to improve bandwid
Multiple segment data object management
Multiple segment data object management
Multiple segment data object management
Multiple segmenting of main memory to streamline data paths in a
Multiple segmenting of main memory to streamline data paths in a
Multiple source generic memory access interface providing...
Multiple storage element command queues
Multiple store miss handling in a cache memory memory system
Multiple user interfaces for an integrated flash device
Multiple user interfaces for an integrated flash device
Multiple variable cache replacement policy
Multiple variable cache replacement policy
Multiple variance platform for the management of mobile devices
Multiple virtual machine system with efficient cache memory...
Multiple-core processor with flexible cache directory scheme
Multiple-grant controller with parallel arbitration...
Multiple-level persisted template caching
Multiple-level persisted template caching