Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2000-03-31
2003-07-01
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S119000, C711S121000, C711S129000
Reexamination Certificate
active
06587937
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to computers, microprocessors, and more specifically to a multiple virtual machine system employing partitioning with an efficient cache memory design.
Microprocessors are widely used in many embedded processor applications. The many different embedded applications require varying degrees of performance and cost. For example low-cost low-power processors are required for portable applications with the central processing unit and other components forming a system-on-a-chip. Commercial processors are available for these applications. Low-cost commercial processors are used in consumer products such as appliances, entertainment systems, automobiles, etc.
Military and commercial avionics and communications systems require microprocessors for embedded applications with much higher performance and reliability. Microprocessors are required with a verifiable hardware design and with features such as built-in-test and monitoring capabilities for mission critical systems. To meet the requirements of these mission critical systems, commercial processors need to be investigated and custom microprocessors need to be developed. Approaches are needed that provide system-on-chip solutions, support high reliability, and provide for function partitioning and reconfiguration.
Currently one computer system is used for each unique function in avionics and communications equipment such as autopilots, flight management systems, and displays. The avionics computer systems offer only limited inter-functional dependencies in that they exchange sensor and control data. This computer system architecture provides strong functional isolation needed for critical avionics systems. Avionics systems typically must be certified to meet reliability standards established by regulatory agencies such as the Federal Aviation Administration. System certification involves verifying that all system components work properly together.
In order to reduce hardware costs involved with commercial and custom high performance microprocessors, it may be beneficial to provide one computer system to perform many distinct functions in avionics, communications, and other equipment. Having one computer system may substantially reduce certification costs in avionics systems. System functions are certified once, independently, and to the level appropriate to their criticality while a composition of functions retains individual certification.
Many different functions can be performed on one computer system by using virtual machines. A virtual machine is a platform-independent instruction set that allows a user a portable programming environment. Multiple virtual machines can run on a single physical processor through sharing or partitioning of the physical processor operation. The multiple virtual machines perform as if they were separate physical machines operating on one processor. A well-known virtual machine is the JAVA virtual machine.
With one computer system the avionics functions are no longer physically isolated. Interaction of functions must be considered without the physical isolation. Partitioning of functions provides the necessary isolation for safety critical avionics applications such that each function is guaranteed not to be affected by the operation of any other function.
Partitioning and multiple virtual machines are processing technologies that have applications to many areas including avionics and communications products. Partitioning and multiple virtual machines can provide direct cost advantages in software development. Multiple levels of certified software can co-exist on the same processor. Software can be certified once and re-used in multiple application environments. These advantages are possible with brick-walled partitioning provided with partition management and with deterministic execution. Efficient techniques to provide deterministic behavior with on-chip cache have not been developed. What is needed is an approach to provide deterministic execution that does not significantly increase the required cache size and is independent of the number of partitions or virtual machines.
SUMMARY OF THE INVENTION
A multiple virtual machine computer system comprising an efficient cache design is disclosed. In one embodiment of the invention the multiple virtual machine computer system comprises a microprocessor that executes instructions for one of a plurality of partitions operating on the multiple virtual machine. The microprocessor issues memory reads and writes for a current partition to a partition management unit. The partition management unit selects a current partition cache for the current partition to receive the current partition memory reads and writes from the partition management unit and to resolve memory read hits and memory misses. The partition management unit selects a next partition cache when the next partition becomes active to receive next partition memory reads and writes from the microprocessor. An external memory contains data organized in frame blocks and contains cache block addresses for the plurality of partitions. The external memory provides data to the microprocessor when the current partition cache resolves the memory misses. The external memory provides appropriate frame block data to the next partition cache when the current partition cache is active by cycle stealing or using spare cycles from the current partition to restore the next partition cache to a previous state. The next partition cache may also be restored to a previous state during a gap of time while switching from the current partition to the next partition. Two or three cache memories may be employed in the present invention. The cache memory storing and restoring and multiple virtual machine context switching may also be performed in software.
It is an object of the present invention to provide efficient support of high performance and deterministic behavior in multiple virtual machine microprocessor architectures.
It is an object of the present invention to provide an efficient cache design that is adaptable to cached microprocessor architectures.
It is a feature of the present invention to provide high-speed operation and deterministic behavior in a multiple virtual machine system with the addition of only two or three caches.
It is a feature of the present invention to be able to load caches using three different approaches.
It is an advantage of the present invention to be able to provide high-speed operation and deterministic behavior for multiple virtual machine applications in safety-critical avionics applications to reduce software certification costs.
REFERENCES:
patent: 5535203 (1996-07-01), Alatalo et al.
patent: 5555245 (1996-09-01), Alatalo et al.
patent: 5570358 (1996-10-01), Alatalo et al.
patent: 5627992 (1997-05-01), Baror
patent: 5787490 (1998-07-01), Ozawa
patent: 5875464 (1999-02-01), Kirk
patent: 6014728 (2000-01-01), Baror
patent: 6026471 (2000-02-01), Goodnow et al.
patent: 6295580 (2001-09-01), Sturges et al.
patent: 6317872 (2001-11-01), Gee et al.
patent: 6374286 (2002-04-01), Gee et al.
patent: 6438677 (2002-08-01), Chaudhry et al.
Kirk, “Process Dependent Static Cache Partitioning for Real-Time Systems,” pp 181-190, IEEE, 1988.*
Dahlgren et al., “On Reconfigurable On-Chip Data Caches,” pp 189-198, ACM, 1991.*
Liedtke et al., “OS-Controlled Cache Predictability for Real-Time Systems,” pp 213-223, IEEE, 1997.
Jensen David W.
Koenck Steven E.
Elmore Stephen
Eppele Kyle
Jensen Nathan O.
Kim Matthew
Rockwell Collins, Inc.
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