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Preemptive memory-block splitting

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Preservation of intent of a volume creator with a logical...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Process assignment by nodal affinity in a myultiprocessor system

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Process, apparatus, and system for storing data check...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Processing a data stream

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Processing high-speed digital datastreams with reduced memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Program execution environment specification method and a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Programmable gate array configuration memory which allows sharin

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Programmatically pre-selecting specific physical memory...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Proportionally growing stack in a linear memory array

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Protocol-based memory system for initializing bus interfaces...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Providing a single drive letter user experience and regional...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Providing memory management within a system management mode

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Pseudo-random address generation mechanism that reduces address

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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