Programmable gate array configuration memory which allows sharin

Details Programmable gate array configuration memory which allows sharin Programmable gate array configuration memory which allows sharin

1996-02-14

1998-04-07

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Memory configuring

36518908, G06F 1200

Patent

active

057377669

ABSTRACT:
A field programmable gate array (FPGA) memory system which allows the same array of memory to contain both configurable memory and user memory. The FPGA user logic can modify the information contained within the configurable memory and the user memory. The information stored within the configuration memory defines the logic within the user logic. Therefore, the user logic can modify sections of the logic within the user logic. The configuration memory and the user memory share resources such as address decoders, bitlines and sense amplifiers.

REFERENCES:
patent: 5099150 (1992-03-01), Steele
patent: 5414377 (1995-05-01), Freidin
patent: 5432719 (1995-07-01), Freeman et al.
patent: 5469003 (1995-11-01), Kean
patent: 5583450 (1996-12-01), Trimberger et al.
patent: 5600597 (1997-02-01), Kean et al.

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