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Logical volume selection in a probability-based job scheduler

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process
Reexamination Certificate

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Logical-to-physical lane assignment to reduce clock power...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
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Logical-to-physical lane assignment to reduce clock power...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
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Long latency interface protocol

Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying
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Long latency interface protocol

Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying
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Long latency interrupt handling and input/output write posting

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
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Long-distance synchronous bus

Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying
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Long-distance synchronous bus

Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying
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Long-haul PCI-to-PCI bridge

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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Look ahead split release for a data bus

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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Look-up table based circuitry for sharing an interrupt...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
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Look-up table based USB identification

Electrical computers and digital data processing systems: input/ – Intrasystem connection – System configuring
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Loop formation eliminating apparatus of a serial bus system...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
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Loop initialization procedure exception handling for fibre...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process
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Loopback direct memory access control system for a digital...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
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Loss of universal serial bus communication

Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral monitoring
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Low cost data streaming mechanism

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
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Low latency bridging between high speed bus networks

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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Low latency data packet reception and processing

Electrical computers and digital data processing systems: input/ – Input/output data processing – Flow controlling
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Low latency data path in a cross-bar switch providing...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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