Single address queue for handling multiple priority requests

Single address queue for handling multiple priority requests

Single BIOS technique for supporting processors with and...

Single bus command having transfer information for...

Single cycle modified round-robin arbitration with embedded...

Single descriptor scatter gather data transfer to or from a...

Single driver for multifunctional SCSI chips

Single extender card method and system for troubleshooting a...

Single integrated circuit embodying a risc processor and a...

Single latch semaphore register device for multi-processor syste

Single port first-in-first-out (FIFO) device having overwrite pr

Single request data transfer regardless of size and alignment

Single request data transfer regardless of size and alignment

Single shelf network system capable of providing expansion...

Single stage FIFO memory with a circuit enabling memory to be re

Single wire bus for connecting devices and methods of...

Single wire bus for connecting devices and methods of...

Single wire serial communication system

Single-chip data processing apparatus incorporating an...

Single-chip multi-media card/secure digital (MMC/SD)...