Hardware assisted firmware task scheduling and management
Hardware semaphores for a multi-processor system within a...
Hiding system latencies in a throughput networking system
Hiding system latencies in a throughput networking systems
Hierarchical memory access via pipelining with deferred...
Hierarchical memory access via pipelining with deferred...
Hierarchically expandable fair arbiter
High speed bus system that incorporates uni-directional...
High-speed starvation-free arbiter system, rotating-priority...
Hybrid switching architecture