Dynamic system configuration for functional design verification
Dynamic weighting and/or target zone analysis in timing...
Dynamically configured on-chip communications paths based on...
Dynamically determining a route through one or more switch...
Dynamically interleaving randomly generated test-cases for...
Dynamically reconfigurable logic networks interconnected by fall
Dynamically reconfigurable precision signal delay test...
Dynamically reconfiguring clock domains on a chip
Dynamically reconfiguring clock domains on a chip
Dynamically-configurable digital processor using method for...