Dynamically reconfigurable precision signal delay test...

Details Dynamically reconfigurable precision signal delay test... Dynamically reconfigurable precision signal delay test...

2005-04-12

2005-04-12

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C702S119000, C714S724000, C714S726000

Reexamination Certificate

active

06880137

ABSTRACT:
A programmable time event and waveform generator for the application of precise timing patterns to a logic circuit and the capture of response data from the logic circuit. The time event and waveform generator comprises a programmable delay element that is programmed with values stored in pattern memory. For scan based testing, the time event and waveform generator is programmed between test pattern scan sequences by serial loading from the test pattern memory. The generator may be used to generate precise signal transitions to input pins of a circuit under test, and to capture at precise times the signal states from the output pins of a circuit under test. The data for programming the delay element is accessed from test pattern memory.

REFERENCES:
patent: 6084930 (2000-07-01), Dinteman
patent: 6115836 (2000-09-01), Churchill et al.
patent: 6591213 (2003-07-01), Burlison
patent: 6598192 (2003-07-01), McLaurin et al.
patent: 20030110427 (2003-06-01), Rajsuman et al.

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