No-disturb bit line write for improving speed of eDRAM

Details No-disturb bit line write for improving speed of eDRAM No-disturb bit line write for improving speed of eDRAM

2011-05-31

2011-05-31

Le, Vu A (Department: 2824)

Static information storage and retrieval

Read/write circuit

Precharge

C365S189160, C365S149000, C365S210130

Reexamination Certificate

active

07952946

ABSTRACT:
A method of operating a memory circuit includes providing the memory circuit. The memory circuit includes a memory cell; a word line connected to the memory cell; a first local bit line and a second local bit line connected to the memory cell; and a first global bit line and a second global bit line coupled to the first and the second local bit lines, respectively. The method further includes starting an equalization to equalize voltages on the first and the second local bit lines; stopping the equalization; and after the step of starting the equalization and before the step of stopping the equalization, writing values from the first and the second global bit lines to the first and the second local bit lines.

REFERENCES:
patent: 6839268 (2005-01-01), Osada et al.
patent: 2005/0174859 (2005-08-01), Mori et al.
patent: 2008/0117698 (2008-05-01), Hsu

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