4. Static information storage and retrieval
  5. Addressing
  6. Sync/clocking

Subramani Kengeri

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2T dual-port DRAM in a pure logic process with...

Static information storage and retrieval – Systems using particular element – Semiconductive
Reexamination Certificate

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Apparatus and method for power reduction in dRAM units

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
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Apparatus and method of reducing the pre-charge time of bit...

Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate

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Charge shared match line differential generation for CAM

Static information storage and retrieval – Associative memories – Ferroelectric cell
Reexamination Certificate

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Compact load-less static ternary CAM

Static information storage and retrieval – Associative memories – Ferroelectric cell
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Profile ID: LFUS-PAI-P-207106

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