Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
Inventor
active
Architecture for vertical transistor cells and...
Device architecture and process for improved vertical memory...
DRAM cell arrangement
DRAM cell arrangement and method for fabricating it
DRAM cell arrangement and method for the production thereof
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Profile ID: LFUS-PAI-P-1864740