4. Static information storage and retrieval
  5. Addressing
  6. Sync/clocking

S. Babar Raza

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Architecture for a dual segment dual speed repeater

Multiplex communications – Channel assignment techniques – Carrier sense multiple access
Patent

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Architecture for a dual segment dual speed repeater

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate

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Architecture for a dual segment dual speed repeater

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate

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Architecture for implementing virtual multiqueue fifos

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate

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Architecture for multi-queue storage element

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate

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Profile ID: LFUS-PAI-P-142653

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