Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
Inventor
active
Integrated circuit transistor having drain junction offset
Memory masking for periphery salicidation of active regions
Memory masking for periphery salicidation of active regions
Method for forming isolated intra-polycrystalline silicon struct
Method for memory masking for periphery salicidation of...
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Profile ID: LFUS-PAI-P-615028