Method for forming isolated intra-polycrystalline silicon struct

Details Method for forming isolated intra-polycrystalline silicon struct Method for forming isolated intra-polycrystalline silicon struct

1995-03-29

1997-10-28

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257347, 257 66, H01L 2976, H01L 2994, H01L 31062, H01L 31113

Patent

active

056820526

ABSTRACT:
Therefore, according to the present invention, the isolation between adjacent intra-polycrystalline silicon layer components of one or more polycrystalline silicon layers of an integrated circuit device may be enhanced by patterning and then implanting one or more such polycrystalline silicon layers with a high dose of oxygen or nitrogen, in the range of approximately 1.times.10.sup.19 /cm.sup.2 to 1.times.10.sup.17 /cm.sup.2. A post implant anneal is performed in either nitrogen or argon to form a layer of either silicon dioxide or silicon nitride having desirable planar characteristics. The anneal is performed at a temperature range of approximately 1000 to 1400 degrees Celsius.

REFERENCES:
patent: 4663827 (1987-05-01), Nakahara
patent: 4676841 (1987-06-01), Celler
patent: 4929566 (1990-05-01), Beitman
patent: 5266523 (1993-11-01), Manning
patent: 5298782 (1994-03-01), Sundaresan
Nuclear Instruments and Methods in Physics Research, B19/20 (1987) "Fabrication of Buried Layers of SiO2 and Si3N4 Using Ion Beam Synthesis," K.J. Reeson, pp. 269-278.
Materials Chemistry and Physics, 31 (1992), "Synthesis of Buried Insulating Layers in Silicon by Ion Implantation," A.M. Ibrahim & A.A. Berezin, pp. 285-300.
"Oxygen Distributions in Synthesized SiO2 Layers Formed by High Dose O+ Implantation into Silicon," PLF Hemment, et al., pp. 203-208, 1984, vol. 34.

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