4. Electrical computers and digital processing systems: memory
  5. Storage accessing and control
  6. Hierarchical memories

James Nolan Hardage, Jr.

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Apparatus for bus frequency independent wrap I/O testing and...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate

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Autonomous way specific tag update

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Bus optimization with read/write coherence including...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Data processing system and method for maintaining translation lo

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Multi-stage pipelined data coalescing for improved frequency ope

Electrical computers and digital data processing systems: input/ – Input/output data processing – Concurrent input/output processing and data transfer
Patent

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Profile ID: LFUS-PAI-P-224635

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